A multichannel HDA codec on the RP2040
The HDA Link interface, also called Azalia, is usually found only in PC chipsets. The author of a Habr article decided to check whether the RP2040 microcontroller on the Raspberry Pi Pico could act as its host. The appeal is clear: multichannel HDA audio codecs offer far more channels than I²S.
The project is built around an RP2040 with PIO blocks and a Realtek ALC889 codec on the board, a board left over from an earlier failed attempt with an STM32F103 and a Spartan-3. The BCLK signal must be a stable 24 MHz, so it cannot be generated in software. The interface uses four lines: BCLK, SYNC, SDO and SDI, and a frame of 1000 bits gives 48 kHz; for 96 and 192 kHz the number of samples per frame increases.
The implementation uses four PIO state machines: SDO output, SYNC output, SDI input with BCLK generation, and a state machine that assigns an address to the codec. Data moves over DMA, while the RP2040's second core packs samples and commands and parses the codec's replies. The demo project generates sine waves on five stereo DACs, with the third harmonic around −123 dB.
The codec ran at a 192 kHz sample rate. Overclocking the RP2040 to 32 MHz (256 kHz) worked, but the codec heated up considerably. The board draws 150 to 270 mA at 3.3 V. There are limits too: the built-in filters act as a first-order high-pass with a cutoff of about 4 Hz, and the HDA input bandwidth does not allow three stereo channels at 24/192 simultaneously.
The author also found a synchronization bug in the RP2040 when DMA, USB and XIP sampling run together, whose cause was identified by specialists at Raspberry Pi. For complex processing he recommends the RP2350, which has DSP instructions. I like that the project honestly shows both its results and its weak points.
Source: Habr
The project is built around an RP2040 with PIO blocks and a Realtek ALC889 codec on the board, a board left over from an earlier failed attempt with an STM32F103 and a Spartan-3. The BCLK signal must be a stable 24 MHz, so it cannot be generated in software. The interface uses four lines: BCLK, SYNC, SDO and SDI, and a frame of 1000 bits gives 48 kHz; for 96 and 192 kHz the number of samples per frame increases.
The implementation uses four PIO state machines: SDO output, SYNC output, SDI input with BCLK generation, and a state machine that assigns an address to the codec. Data moves over DMA, while the RP2040's second core packs samples and commands and parses the codec's replies. The demo project generates sine waves on five stereo DACs, with the third harmonic around −123 dB.
The codec ran at a 192 kHz sample rate. Overclocking the RP2040 to 32 MHz (256 kHz) worked, but the codec heated up considerably. The board draws 150 to 270 mA at 3.3 V. There are limits too: the built-in filters act as a first-order high-pass with a cutoff of about 4 Hz, and the HDA input bandwidth does not allow three stereo channels at 24/192 simultaneously.
The author also found a synchronization bug in the RP2040 when DMA, USB and XIP sampling run together, whose cause was identified by specialists at Raspberry Pi. For complex processing he recommends the RP2350, which has DSP instructions. I like that the project honestly shows both its results and its weak points.
Source: Habr
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